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Synopsys Acquires InnoLogic Systems, Inc.



MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--June 25, 2003--Synopsys Inc. (Nasdaq:SNPS), the world leader in integrated circuit (IC) design software, today announced it has acquired InnoLogic Systems, Inc., a pioneer of memory and full-custom equivalence checking technology. With this acquisition, Synopsys now offers a faster, more comprehensive formal verification solution for today's complex system-on-chip (SoC) designs containing large instances of embedded memories, complex high-speed I/Os, and other full custom circuits. Terms of the deal were not disclosed.

"With a large percentage of total silicon being consumed by memories and complex high-speed I/Os, we recognized the growing need for technology that can quickly and accurately verify the functionality of these custom components. This acquisition demonstrates Synopsys' commitment to providing best-in-class formal verification solutions to address these challenges," said Antun Domic, senior vice president and general manager of Synopsys' IC Implementation business unit. "By retaining the strength of InnoLogic's key technology and technologists we will be able to extend our equivalence checking capability to address challenges of highly complex custom designs."

SoC designs contain multiple full custom elements such as embedded memories and complex high-speed I/O's, which are typically difficult to verify with traditional equivalency checking tools. InnoLogic's solution is able to verify the functionality of these custom designs through an approach called "sequential equivalency checking" based on patented symbolic simulation technology. In addition, InnoLogic's transistor-level formal analysis capabilities consider the dynamic effects of transistor size and process technology, which is critical for accurately modeling the timing-dependent functionality found in these type of components. These capabilities enable the custom circuit designer to fully verify the functional equivalence of their behavioral level simulation models against their transistor-level implementation netlist - something not offered in other equivalency checking tools.

"Many of our customers want a comprehensive verification solution from a single supplier that addresses their entire verification challenge," said Dr. Dian Yang, co-founder, president and CEO of InnoLogic Systems, Inc. "By bringing together Synopsys' Discovery(TM) Verification Platform with InnoLogic's complementary formal verification technologies and transistor-level expertise, we will enable our customers to verify their next-generation designs with higher confidence."

Forward Looking Statements

This press release contains forward-looking statements within the meaning of the safe harbor provisions of Section 21E of the Securities Exchange Act of 1934, including statements regarding the ability of Synopsys to expand the capabilities of its verification platform. These statements are based on Synopsys' current expectations and beliefs. Actual results could differ materially from the results implied by these statements as a result of unforeseen difficulties in completing integration of InnoLogic's technology with Synopsys' Formality tool, difficulties attendant in any new product offering and the other factors contained in Synopsys' Quarterly Report on Form 10-Q for the fiscal quarter ended April 30, 2003.

About Synopsys

Synopsys, Inc. (Nasdaq:SNPS) is the world leader in electronic design automation (EDA) software for integrated circuit (IC) design. The company delivers technology-leading IC design and verification platforms to the global electronics market, enabling the development of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/.

Synopsys and Formality are registered trademarks and Discovery is a trademark of Synopsys, Inc.

CONTACT: Synopsys, Inc.
             Yvette Huygen, 650/584-4547 (Editorial) 
             yvetteh@synopsys.com
             Jessica Kourakos, 650/584-4289 (Investor)
             jessicak@synopsys.com
             or
             InnoLogic Systems, Inc.
             Yukari Chin, 408/432-6188 x 119
             yukari@innologic-systems.com
             or
             Edelman Public Relations
             Jodi Warner, 650/429-2752
             jodi.warner@edelman.com

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